Fault tolerance is the destination of quantum computing: a machine whose logical qubits are protected by error correction, so that arbitrarily long computations can be performed despite imperfect hardware. It is also the standard against which every qubit platform must eventually be judged. This article explains what fault tolerance requires, why excitonic systems are far from it, and why that distance does not diminish the value of what excitonic systems can do now — principally, quantum simulation.

The thesis is straightforward: excitonic quantum technology is simulator-first, not because simulation is a lesser goal, but because simulation is what the physics supports today, while fault-tolerant gate-based computation demands capabilities that excitonic systems have not yet demonstrated at any scale.

What fault tolerance requires

A fault-tolerant quantum computer is not simply a larger version of today’s noisy devices. It requires a qualitative change: the ability to detect and correct errors faster than they accumulate, so that the logical error rate decreases as more physical qubits are added. The standard framework is the surface code and its relatives, in which many physical qubits encode one logical qubit, and repeated syndrome measurements detect errors without collapsing the encoded information.

The requirements are demanding in every dimension. First, physical error rates must fall below a threshold — for the surface code, roughly on the order of one error per thousand operations under realistic assumptions, with the exact number depending on the code, the noise model, and the decoder. Above threshold, adding more qubits makes things worse, not better. Below threshold, adding more qubits suppresses logical errors exponentially, but the overhead is large: a single useful logical qubit may require hundreds to thousands of physical qubits, and a machine capable of running commercially or scientifically relevant algorithms may require on the order of millions of physical qubits.

Second, the system needs fast, high-fidelity measurement and feed-forward: syndrome measurements must be performed repeatedly, and corrections must be applied based on their outcomes, all within the coherence time. Third, it needs individually addressable qubits with a universal gate set, high-fidelity two-qubit gates, and low crosstalk. Fourth, it needs qubit loss to be low or correctable — qubits that disappear, as excitons do when they recombine, are a particularly challenging error channel. Fifth, it needs classical control and decoding infrastructure capable of processing syndrome data in real time at scale.

No platform has yet demonstrated fault tolerance at scale. Superconducting and ion-trap systems have demonstrated the components — below-threshold gates, repeated syndrome measurements, small logical qubits with error suppression — and are scaling toward larger logical qubits. Excitonic systems have not yet demonstrated even the components at the level required: benchmarked two-qubit gates, repeated error correction cycles, or logical qubits with suppressed errors. That is the gap this article quantifies.

Where excitonic systems stand on each requirement

On physical error rates: excitonic gates have not been benchmarked to the standard used in other platforms (randomized benchmarking, gate-set tomography, or equivalent), because the gates themselves — particularly two-qubit entangling gates between individually addressable exciton qubits — have not been demonstrated in a form that can be benchmarked. Without a measured gate error rate, the question of whether excitonic gates are below threshold cannot even be asked. This is the most basic gap, and it precedes all others.

On measurement and feed-forward: optical readout of excitonic states is fast and, in single-emitter systems, can be high-fidelity. But repeated, non-destructive syndrome measurement of an exciton qubit — the kind of measurement that detects an error without destroying the qubit — has not been demonstrated. Exciton readout is typically destructive: the exciton recombines, emitting a photon, and the qubit is gone. Non-destructive readout would require a quantum non-demolition measurement, which is an active research goal, not an established capability.

On addressability and gates: individually addressable excitons in arrays have been demonstrated in the sense that separate emitters can be excited and imaged. But individually addressable qubits with independent, high-fidelity control and low crosstalk — the kind of control that allows a gate on one qubit without disturbing its neighbors — has not been demonstrated for exciton qubits at the fidelity required for error correction. Polariton lattices have site-resolved control, but they are simulators, not gate-based processors, and their control is analog rather than digital.

On qubit loss: exciton recombination is not a rare error; it is the normal fate of every exciton. Any error-correction scheme for exciton qubits must treat loss as the dominant error channel, not as a perturbation. Loss-tolerant codes exist in theory, but they add overhead and require heralded loss detection — knowing that a qubit was lost, rather than silently losing it. Demonstrating heralded loss detection and loss-tolerant correction for exciton qubits is an open problem.

On scale: the largest excitonic quantum systems demonstrated — polariton lattices, quantum-dot arrays — involve tens of sites or emitters, not the thousands to millions required for fault tolerance. Scaling from tens to millions requires solving fabrication reproducibility, control wiring, crosstalk, and characterization at every step, challenges that every platform faces but that excitonic systems have barely begun to address at the gate-based level.

Why simulation is the right near-term goal

Quantum simulation avoids most of these requirements. A simulator does not need a universal gate set, individual qubit addressability at gate fidelity, or error correction. It needs a tunable Hamiltonian, initialization, evolution, and readout — all of which polariton and excitonic systems provide, as described in earlier articles in this series. A simulator’s output is a measurement of a physical observable — a correlation function, a phase diagram, a dynamical response — not a sequence of logical gates. Errors in a simulator degrade the accuracy of the simulation, but they do not cause the computation to fail catastrophically in the way an uncorrected gate error does in a digital computation. The simulator’s tolerance for imperfection is therefore much higher.

This is why the excitonic field’s most credible near-term contributions are in simulation: polariton lattices emulating Hubbard and topological models, exciton systems studying non-equilibrium dynamics, and analog optimization with condensates. These are not stepping stones to fault tolerance in the sense that building a better simulator automatically yields a better computer. They are a distinct application with its own scientific value, and they play to the platform’s strengths — tunability, imaging, speed, and many-body physics — rather than to its weaknesses.

There is also a middle path: digital-analog simulation, in which analog evolution under a tunable Hamiltonian is combined with digital single-qubit operations. This approach may extract more computational power from a simulator-like device without requiring full fault tolerance. Whether excitonic systems can implement useful digital-analog protocols is an open question, but it is a more plausible near-term goal than full fault tolerance.

What a credible path toward fault tolerance would look like

If excitonic systems are ever to become fault-tolerant, the path will have to pass through a sequence of milestones, each of which is currently undemonstrated. First, a high-fidelity, benchmarked two-qubit entangling gate between two individually addressable exciton qubits (or between exciton-mediated spin qubits). Second, repeated, high-fidelity single- and two-qubit gates with error rates approaching threshold, demonstrated by randomized benchmarking. Third, non-destructive or heralded-loss readout that enables syndrome measurement. Fourth, a small logical qubit — a handful of physical qubits encoding one logical qubit — with demonstrated error suppression relative to the physical qubits. Fifth, scaling of that logical qubit to larger codes and to multiple logical qubits with logical gates.

Each milestone is hard, and each requires the previous ones. The field should be judged by progress through this sequence, not by announcements that skip to the end. A paper that reports a new excitonic coherence record, a new entanglement demonstration, or a new simulator result is valuable, but it should not be described as progress toward fault tolerance unless it addresses one of the milestones above. Conflating scientific progress with progress toward fault tolerance is the most common distortion in coverage of this field.

The role of hybrid architectures on the road

Hybrid architectures, discussed in the previous article, offer a plausible route by which excitons contribute to fault tolerance without themselves being the fault-tolerant qubits. In this vision, long-lived qubits — superconducting, spin, or trapped-ion — perform the fault-tolerant computation, while excitons provide the interfaces: photon generation, spin-photon entanglement, transduction, and networking. The fault-tolerance requirements then fall on the long-lived qubits, which are closer to meeting them, while excitons are judged by interface metrics — efficiency, fidelity, noise — rather than by gate thresholds.

This is the most realistic sense in which excitons participate in fault-tolerant quantum computing in the foreseeable future: not as the qubits being corrected, but as the components that connect corrected qubits into a larger system. It is a substantial role, and it is consistent with the physics. It also means that the excitonic field’s progress toward fault tolerance should be measured by interface milestones, not by exciton-qubit gate milestones, for hybrid architectures.

How to read fault-tolerance claims

When a result is presented as a step toward fault-tolerant quantum computing with excitons, apply a short checklist. First, does it demonstrate a gate, or only coherence, entanglement, or simulation? Second, if it demonstrates a gate, was the gate benchmarked, and what was the error rate? Third, does it address measurement, feed-forward, or loss — or only unitary evolution? Fourth, does it scale — is it demonstrated on more than one or two qubits? Fifth, is the claim about excitons as qubits, or about excitons as interfaces to other qubits? A result that fails the first four checks but passes the fifth is still valuable; it is simply a hybrid result, not an exciton-qubit result.

The history of quantum computing is littered with platforms that were declared the future and then faded when the requirements of fault tolerance became clear. Excitonic systems need not share that fate, but avoiding it requires honesty about where they stand. They stand, today, as a simulator-first technology with promising interface applications — a position of genuine scientific value, and a foundation from which future progress, toward fault tolerance or toward other goals, can be built.

Sources and further reading

  • Literature on quantum error correction, the surface code, fault-tolerance thresholds, and overhead estimates, in Reviews of Modern Physics, Nature, and standard quantum computation textbooks.
  • Literature on logical qubits, repeated syndrome measurement, and error suppression in superconducting and ion-trap systems, in Nature, Science, and Nature Physics.
  • Literature on loss-tolerant quantum computation and heralded loss detection, in Physical Review Letters and Nature Photonics.
  • Literature on polariton and excitonic quantum simulation, as cited in the simulation article in this series, in Nature Physics, Nature Photonics, and Physical Review Letters.
  • Literature on hybrid quantum systems and interfaces, as cited in the hybrid article in this series, in Reviews of Modern Physics and Nature Reviews Physics.
  • Note on verification: threshold figures and overhead estimates quoted above are stated as orders of magnitude under realistic assumptions, because the exact threshold and overhead depend on the code, noise model, decoder, and target algorithm. Any specific claim of “millions of qubits” or a particular threshold should be checked against the code and assumptions used. No excitonic gate error rate is quoted above, because no benchmarked exciton-qubit gate error rate has been established in the sense described.