Potential Circuits: A New Paradigm for Excitonic Computing

For over half a century, CMOS (Complementary Metal-Oxide-Semiconductor) technology has formed the backbone of digital electronics. Its transistors rely on carrier motion through semiconductors, with carefully engineered concepts like depletion layers, threshold voltage control, and the Early effect defining how information flows. But as transistor scaling nears its physical and thermal limits, a new framework is emerging—excitonic circuits, built not on the flow of electrons, but on the dynamics of bound electron–hole pairs.

Here we introduce a new conceptual framework: Potential Circuits, a design paradigm that replaces the physics of CMOS with excitonic analogues, allowing circuits to function with similar logic principles but entirely new underlying mechanisms.

From CMOS to Excitonic Potential Circuits

CMOS Recap

In CMOS:

• Depletion regions form when doped regions create electric fields that regulate carrier flow.
• Threshold voltage defines the point where a channel forms for conduction.
• The Early effect describes how channel length modulation alters current in response to applied voltages.

These phenomena are all tied to mobile charges (electrons/holes) in bulk silicon.

Excitonic Perspective

Excitons are bound electron–hole pairs. They don’t carry net charge but instead carry potential energy encoded in their binding state, spatial position, or momentum. Unlike free charges, excitons propagate more like quasiparticles—part particle, part wave—making them ideal for low-dissipation information transfer.

In Potential Circuits:

• Instead of depletion zones, we use potential traps or energy funnels that localize excitons.
• Instead of threshold voltage, we define a dissociation potential—the point at which excitons can no longer remain bound and transition into free carriers or recombine.
• Instead of the Early effect, we exploit the Exciton Lifetime Effect—how field gradients or local density influence the duration an exciton can exist before recombination.

Building Blocks of Potential Circuits

1. Exciton Wells (the new “channel”)

   • Analogous to MOSFET channels.
   • A nanoscale energy gradient holds excitons in place, controlling whether they propagate forward or remain confined.
   • Depth of the well = logic state.

2. Potential Gates (the new “gate oxide + electrode”)

   • Instead of applying voltage to induce inversion, we modulate excitonic potential landscapes with optical, plasmonic, or strain-induced fields.
   • A gate photon pulse or electric field changes exciton binding energy, switching the circuit between ON (stable excitons propagate) and OFF (excitons recombine).

3. Exciton Lifetime Modulator (the new “source-drain bias”)

   • Current in CMOS is the flow of electrons from source to drain.
   • In Potential Circuits, the equivalent is excitons migrating from one trap to another before decaying.
   • Information is encoded in whether the exciton survives long enough to reach the output node.

4. Exciton Recombination Node (the new “drain”)

   • Output is generated by exciton recombination (light emission, plasmon burst, or energy release).
   • The presence or absence of this recombination signal encodes logic states.

A Logic Gate Example

Consider an Excitonic Inverter (Potential NOT Gate):

• Input: A gate photon pulse raises the potential well barrier.
• If input = 0 (no pulse): excitons propagate freely → recombination occurs at output → output = 1.
• If input = 1 (pulse present): the barrier destabilizes the excitons → they recombine early, no signal reaches output → output = 0.

This mirrors CMOS inverter behavior but uses exciton survival dynamics instead of depletion-layer conduction.

The Exciton Analogue of CMOS Phenomena

Advantages of Potential Circuits

• Ultra-low power: Exciton propagation involves far less Joule heating than electron currents.
• Hybrid optical-electronic integration: Exciton recombination naturally emits photons, enabling direct connection to photonic interconnects.
• Quantum-compatible: Excitons exhibit coherence properties, allowing classical-quantum hybrid architectures.
• Scalability: Just as CMOS scaled by controlling depletion regions, Potential Circuits can scale by engineering nanoscale exciton traps and lifetimes.

Toward an Excitonic Future

CMOS was not simply about transistors—it was about creating a paradigm for building scalable, reliable circuits based on a set of repeatable physical rules. Excitonic Potential Circuits offer a similar foundation, with exciton dynamics taking the place of electron transport.

This new model points toward a future where information is carried by bound states rather than free carriers, where logic gates are defined by exciton survival probabilities, and where computation itself becomes an interplay of potential energy landscapes rather than current flow.

In short, excitonics may not just extend Moore’s law—it may replace the law entirely, opening a new age of potential-based computation.