On November 9, Q.ANT and IONOS announced a joint pilot program that puts the Stuttgart startup’s second-generation photonic processors onto bare-metal servers in a German IONOS datacenter, available free of charge to approved developers with a concrete use case, starting this month. It is the first time photonic computing has been offered in a commercial server environment — ordinary cloud infrastructure a developer rents, administers over SSH, and runs their own workloads on.
That is a real milestone — but not a product launch, not a measured result, and not evidence that photonic computing beats GPUs on anything. It is an evaluation programme with a deliberately narrow door, and the first chance for outside hands to run workloads the vendor did not choose, on hardware the vendor does not control.
What the pilot actually offers
Applicants submit a concrete use case through the IONOS website; after review and a video call, selected participants — who must have the expertise to administer a bare-metal server independently — get access to Q.ANT’s second-generation Native Processing Unit (NPU) via a dedicated bare-metal server in a German IONOS datacenter. IONOS provisions each system manually, with SSH root access and an optional KVM console. The programme is free for the selected participants.
The programme includes onboarding, workload reviews with Q.ANT, and a final workshop evaluating energy and performance metrics and production suitability. Participants retain ownership of their workloads, data and results, which remain confidential — only aggregated, anonymised insights feed back into development.
The workload list is what matters most for judging what this pilot can settle. The companies name industrial image processing, time-series prediction, scientific simulation and robotics; the pilot documentation adds LLM and foundation-model inference, physical AI and world models. The pilot is explicitly designed to find out which applications benefit most — not to confirm a benefit already established.
The pilot is also the next step in a relationship that already exists: in May 2026, IONOS became Q.ANT’s first commercial customer, under an agreement for Q.ANT’s Native Processing Server. IONOS is a committed customer testing its supplier’s product — a reasonable arrangement, but not an independent evaluation.
How the NPU works
Q.ANT’s processors are built on thin-film lithium niobate (TFLN), a material that manipulates light efficiently. The NPU performs mathematical operations natively in light — most importantly, complex nonlinear functions, which on a conventional CMOS chip must be decomposed into long sequences of digital steps. The company’s argument: computing those functions directly in light lets a model reach comparable or better results with fewer parameters, fewer operations and fewer resources — and therefore less energy.
The NPU is a co-processor, not a computer. Q.ANT positions it explicitly as a co-processor for particular AI workloads alongside CPUs and GPUs, not as a wholesale GPU replacement. The processors ship as PCIe plug-in cards — in Q.ANT’s own servers, one card per first-generation server and three per second-generation server — and, as LRZ researcher Dr. Ehab Saleh put it, “the co-processors cannot perform all operations using light,” so “a continuous data exchange between photonic and classical processing units is required.” CMOS circuitry sits on the cards for that reason, and a software library abstracts the communication so users can call functions from C/C++ or Python without understanding the optics.
The energy argument therefore has a boundary condition: efficiency is highest when computations remain on the optical unit, and data movement between the optical and electronic domains costs energy, latency and precision. The analog system converts between digital and analog at 16-bit precision, photodetector noise has to be accounted for, and more precise results require splitting tasks into several operations. That is the physics of an analog co-processor — and why the workload question is the question the pilot is built to answer.
What LRZ actually measured
The strongest independent evidence about this hardware comes from the Leibniz Supercomputing Centre (LRZ), which received Q.ANT’s second-generation processors in March 2026 and published its evaluation on April 21, testing both generations across HPC and AI workloads.
The headline numbers, as LRZ reported them: the second-generation chips ran up to 50 times faster than the first in the best case, on matrix multiplications, and a convolutional neural network — ResNet-18, named in LRZ’s March release — ran image recognition 25 times faster. On typical HPC workloads, power consumption fell by roughly 50 to 84 percent between generations. The top of that range is roughly sixfold — the source of the “six times less energy” figure in some coverage.
Every one of those numbers needs its baseline stated, because the baseline is the story. LRZ compared the second generation with the first — nothing with a GPU or a CPU, and no measured energy-to-solution figure against a datacenter GPU node. The 50-times figure is a generational improvement, not a competitive one.
LRZ also published power-draw figures that invite a GPU comparison: current GPUs draw up to 1,000 watts, Q.ANT’s systems — server plus card — only 350 to 420 watts, the cards themselves 25 and 100 watts. That compares power draw only: it says nothing about work completed per watt, or per joule to a finished answer — the number that decides whether a datacenter buys the hardware.
There is also a discrepancy worth putting on the record. Q.ANT’s May 19 release says the second-generation NPU “demonstrated up to a 100x performance increase” in LRZ’s evaluation. LRZ’s April article gives a best case of 50 times; no LRZ document contains the 100x figure. A vendor’s account differing from the evaluator’s own is exactly what a pilot with outside users is meant to close — and a reason to pause before repeating the larger number.
LRZ’s researchers expect the chips could be ready for AI clusters within one or two more development cycles.
Two more German centres hold Q.ANT hardware with no published results yet: Jülich (a server procured in November 2025 for a four-year co-design partnership) and the Karlsruhe Institute of Technology (a test system started in August 2026 with about €4.3 million from BMFTR, results to be published open source).
The claims that have not been measured
Alongside LRZ’s measurements sits a set of company figures no outside party has tested — the figures most likely to be repeated without attribution.
Q.ANT claims up to 30 times the energy efficiency of conventional processors, a figure its May release attributes to internal benchmarking. Internal benchmarking is not a measurement, and “conventional processors” is not a baseline. The Gen 2 datasheet lists 150 watts per NPU and 8 billion operations per second (GOPS) per NPU, specified as sustained throughput on nonlinear functions; the roadmap targets 100,000 GOps by 2028. Datasheet figures, not measurements; the roadmap target is a plan, not a result.
The pilot page itself reports 40 percent fewer parameters for image processing and 65 percent fewer for time-series prediction at the same accuracy. Those are the results the closed beta is designed to test against users’ own data and software — which is the right way to treat them. A parameter reduction at the same accuracy, if it holds on customer data, would attack the cost of AI at the model rather than at the chip. But it is a company figure on company workloads until the pilot reproduces it — and the pilot’s confidentiality terms mean that reproduction may arrive only as aggregated, anonymised insight.
None of this makes the figures false. It makes them untested, and the pilot is the test.
The software question
The pilot’s most important design decision is not about hardware at all. It is about who has to do the work of using it.
Q.ANT launched its open-source software development kit on September 23, 2026, supplying C and Python interfaces, sample applications, documentation and a CPU-based simulation backend. It followed that with the Photonic Algorithms Library (Q.PAL), providing APIs for C/C++ and Python. Earlier this year, independent developers compiled and deployed an object detection model directly from PyTorch onto a Q.ANT photonic processor — a milestone that matters because it shows standard machine learning frameworks can interface with photonic hardware natively, without the developer learning optical physics.
That is real progress on the problem that has stalled photonic computing commercially for a decade: hardware nobody can program is hardware nobody buys. But the pilot’s own terms show how far the software still has to go. Participants must administer a bare-metal server independently, and IONOS provisions each system manually — there is no self-service signup, no managed image, no one-click deployment. Model and framework compatibility are settled during onboarding, case by case, with Q.ANT’s engineers. That is the right way to run a pilot — and a measure of how far the stack is from a product.
The deeper software constraint is the one LRZ identified. The analog system converts at 16-bit precision, photodetector noise must be accounted for, and more precise results mean splitting tasks into several operations. The compilers, precision management and libraries that decide which parts of a model stay in light and which return to silicon are the software that decides whether the hardware’s advantages survive contact with a real model.
The sovereignty angle
There is a second thread to this announcement, and it is political. The pilot runs entirely under German jurisdiction, in ISO 27001-certified IONOS datacenters, with European data residency. IONOS chief executive Achim Weiss framed it in those terms: “Promising computing technologies from Europe need sovereign European infrastructure to make the leap into business use.” The results, Weiss said, “will show which applications benefit most.”
The sovereignty framing is not decoration; it is the commercial logic of the programme. Q.ANT runs its own TFLN chip pilot line in Stuttgart with the Institute for Microelectronics Stuttgart (IMS CHIPS), backed by a €14 million investment and designed to scale to 8-inch wafers — aligning with the European Chips Act 2.0, which recognises photonic integrated circuits as a strategic semiconductor technology. Q.ANT raised an $80 million Series A in late 2025. Pairing that hardware with IONOS produces a hardware-to-cloud stack that is European end to end — attractive to enterprises wary of vendor lock-in with foreign hyperscalers.
One week earlier, on November 3, the UK’s Advanced Research and Invention Agency announced it would deploy eight optical inference servers from Lumai, an Oxford spinout, in its Scaling Inference Lab in a commercial datacenter — a story this publication covered in its last edition. Two evaluation programmes for two different optical architectures, announced within a week, in two countries.
What to watch next
The pilot is a test, and tests are judged by what they publish. Five things are worth watching. First, whether the pilot fills — a free programme with a narrow door will attract few serious teams or almost nobody. Second, what the final workshops produce: publishable energy-per-inference numbers on a named model against a named silicon baseline would be something no photonic vendor has yet done in public. Third, the parameter-reduction claim — 40 percent fewer parameters for image processing, 65 percent for time-series prediction — specific, testable, and significant if it holds on customer data. Fourth, the other supercomputing centres: KIT has said it will publish its results as open source, the most likely source of a public, reproducible benchmark. Fifth, the software: whether the SDK, Q.PAL and PyTorch integration mature into a toolchain usable without the vendor in the room.
Optical computing has promised to change the economics of AI for years, usually in device-level numbers that dissolved at the system level. What is different here is not the claim — the numbers are as bold as ever, and some, like the 100x figure, do not match the evaluator’s own account. What is different is the test: real hardware, a commercial datacenter, outside workloads, and a vendor willing to let customers measure it. The measurement is now the story, and it has not happened yet.
Sources and further reading
Primary sources: IONOS newsroom, “IONOS and Q.ANT Launch Photonic Computing Pilot,” November 9, 2026 (announcement, pilot terms, Weiss quotation); Q.ANT pilot page, qant.com/ionos-pilot (programme structure, parameter-reduction figures). Independent evaluation: Leibniz Supercomputing Centre, “LRZ Puts Photonic Computers to Real World Test,” April 21, 2026 (Gen 2 vs Gen 1: up to ~50x faster on matrix multiplications, 25x faster CNN image recognition, power down ~50–84%, server-plus-card 350–420 W vs GPUs up to 1,000 W; no GPU or CPU baseline). Company figures: Q.ANT May 19, 2026 release (IONOS as first commercial customer; “up to a 100x performance increase” and up to 30x energy efficiency from internal benchmarking — the 100x figure appears in no LRZ document); Q.ANT Gen 2 datasheet (150 W per NPU, 8 GOPS sustained on nonlinear functions, 100,000 GOps roadmap target for 2028). Context: Supercomputing News, “Photonic Computing 2026: Supercomputing Centers Test Q.ANT” (the 50x vs 100x discrepancy, LRZ/JSC/KIT status); Unite.AI, “Q.ANT Opens Photonic AI Hardware Pilot on IONOS Bare Metal” (pilot mechanics, SDK launch September 23, 2026); Jülich Supercomputing Centre (November 2025 procurement, four-year co-design partnership) and Karlsruhe Institute of Technology (August 2026 test system, ~€4.3 million BMFTR funding, open-source results). For the parallel UK programme, see this publication’s November 10 piece on ARIA and Lumai.